Electronic design tools allow designers to layout, simulate, and analyze electrical components, such as integrated circuits. For example, a design layout can comprise one or more polygons representing metal structures, such as metal lines, vias, or other structures. The design layout can comprise one or more layers that are generated based upon metal schemes. For example, a first metal layer can be formed according to a first metal scheme having a first design rule check (DRC) rule set specifying various design rules, such as a minimum spacing constraint between polygons, a minimum width constraint of a polygon, an enclosure constraint where a first polygon is enclosed by a second polygon, or a variety of other design rules. Because various designers can use different metal schemes for design layouts (e.g., a first designer specifies a second metal scheme for a second metal layer and a third metal scheme for a third metal layer of a first design layout, whereas a second designer specifies a fourth metal scheme for a second metal layer and a fifth metal scheme for a third metal layer of a second design layout), a fabricator has to maintain a relatively large set of metal schemes.